AutoESL provides the fastest path from algorithms to silicon.
AutoESL provides a powerful high level synthesis solution that enables:
- Synthesis of complex algorithms in C, C++ or SystemC into ASICs or FPGAs
- Software architects to accelerate software algorithms by implementing them in silicon
- System architects to take software models into silicon without manually writing RTL
- Hardware architects to explore and implement the right architecture in silicon
AutoPilot™ is the industry's only high level synthesis solution that:
- Provides broadest multi-language support for C, C++ and SystemC
- Delivers QoR equal to or better than hand-coded RTL
- Optimally targets both ASICs and FPGAs
- Is suited for multiple application domains such as video, wireless, networking, accelerated computing and DSP
AutoPilot™ is being adopted for ASIC and FPGA design by the world’s leading edge semiconductor and system companies for improving performance, reducing power, speeding up verification and cutting RTL design time by over 75%.