AutoPilot™ FPGA
AutoPilot™ FPGA is AutoESL’s high level synthesis tool for FPGAs. AutoPilot™ FPGA takes a complex algorithm in the form of C, C++ or SystemC description or a combination of these languages and automatically generates an equivalent RTL that is ready for synthesis into an FPGA device. AutoPilot FPGA supports both Xilinx and Altera devices.
The benefits of AutoPilot™ FPGA are:
- Multi-language support and the broadest language coverage in the industry. Customers can run synthesis on their code with minimal changes to it.
- Fast time to QoR that is equal to or better than hand-coded RTL.
- Best possible QoR because of intelligent architecture-aware synthesis that uses all of the functions, memories and cores available in the device.
- Support for multiple application domains
- Reduced risk since a high level language (C, C++ or SystemC) based flow will introduce fewer errors in silicon than a flow that is based on manually created RTL
- Well integrated with downstream tools
