 |
 |
 |
In the News
 |
AutoESL & Oasys Re-innovate Synthesis July 8, 2010 Chip synthesis and high-level synthesis: software in hardware. Combining chip synthesis and high-level synthesis provides the best mix of area, performance, and power. |
 |
3D Semiconductor Design with AutoESL June 23, 2010
|
 |
Customer Review of AutoPilot: Power user adopts AutoPilot for complex high-volume ASIC designs June 9, 2010 |
 |
AutoESL at DAC 2010: High-level Synthesis for ASICs and FPGAs June 3, 2010 |
 |
Is it time to start using high-level synthesis? April 30, 2010 Read the latest AutoPilot review in EDN. |
 |
BDTI Study Certifies High-Level Synthesis Flows for DSP-Centric FPGA Design Second Quarter, 2010 Advances in high-level synthesis tools make it easier for DSP developers to implement their designs in FPGAs, benchmarking firm finds |
 |
17 startups join the EE Times' Silicon 60 October 5, 2009 Peter Clark on the EE Times List of 60 Emerging Startups (first published in April 2004) update to version 9.0, including AutoESL as one of the hottest companies to watch.October 5, 2009 EE Times has announced version 9.0 of The EE Times 60 Emerging Startup List and AutoESL has been added to the list. AutoESL is the only company on the list from the ESL marketspace. Of the 60 companies in the list only 17 companies are listed in the entire semiconductor space and very few are related to EDA. |
|
Wow! Even Microsoft uses AutoESL's C synthesis to speed up its SW June 30, 2009 Public Review of AutoPilot by Microsoft The first public review of AutoESL's AutoPilot™ appeared on www.deepchip.com. The review by Ningyi Xu of Microsoft research Asia details the use of the tool for design exploration and goes into extensive detail on the short learning curve and successful use of the tool. |
 |
AutoESL was on Gary Smith's "Must See List" for DAC 2009 |
 |
BDTI certifies AutoPilot BDTI certifies AutoPilot HLS tool. |
 |
BDTI Unveils High-Level Synthesis Tools Certification Program Results January 20, 2010 BDTI announces first results of new High-Level Synthesis Tools Certification Program (HLSTCP). |
 |
A Perfect DSP Storm January 19, 2010 Kevin Morris on how HLS enables DSP processor to FPGA design migration. |
|
BDTI unveils FPGA C-synthesis certification: Can C beat RTL? January 18, 2010 Ron Wilson on BDTi assessing how a C-based methodology can compete with RTL based design flows. |
 |
BDTi, Xilinx, AutoESL and Synfora dispel rumors about high-level synthesis date Brian Baily looks at the QoR results of HLS in the BDTI HLS certification program. |
 |
Study gives mixed marks to high-level synthesis January 18, 2010 Dylan McGrath interprets the BDTI HLS certification with a surprisingly great performance for HLS tools, but some work cut out for FPGA implementation tools. |