Prior to joining AutoESL in October 2008 he was co-founder, President and CEO of Clear Shape Technologies, Inc., which was acquired by Cadence in August 2007 where he then served as a Corporate Consultant. Previously Mr. Sharan was a resident at Mohr-Davidow Ventures, a premier Silicon Valley Venture firm while also providing CEO-consulting to start-ups. From 1998 to 2003, Mr. Sharan was Senior Vice President, Worldwide Sales and Marketing for Numerical Technologies, Inc. He was instrumental in growing the company from pre-revenue stage to a highly successful IPO in April 2000 and was a driver for its acquisition by Synopsys in 2003 where he then served Vice President. In addition, Mr. Sharan held executive and engineering management positions at Ambit Design Systems (acquired by Cadence in 1998); from 1991 to 1997 Mr. Sharan was at Compass Design Automation, where as GM-India Operations, he established a software development center in India. Mr. Sharan also worked for VLSI Technologies and Integrated Device Technology. At IDT he helped initiate the company's first overseas Test and Assembly plant in Penang, Malaysia.

Mr. Sharan has an MBA from University of California, Berkeley, an MS in Engineering from Houston, Texas and a B. Tech Degree in Engineering from IIT, Kanpur - India. He is a charter member of TIE, an organization devoted exclusively to entrepreneurism.

In 2002 he founded Calypto Design Systems and was CEO until 2006 leading the company through multiple funding rounds, multiple successful product launches and to its current growth stage. He was subsequently Chairman of the Board at Calypto. Earlier he was a Founder and Managing Director of Caltos Capital, a venture capital firm. Prior to that he was a founding-employee of Ambit Design Systems (where he worked with Mr. Sharan) as Head of R&D and CTO. Dr. Varma was also a key driver of Ambit's acquisition by Cadence. Subsequent to the acquisition by Cadence he was a Cadence Fellow and a Vice President & CTO of the Ambit Group of Cadence. He has held senior engineering positions at Silicon Compiler Systems, Mentor Graphics and Viewlogic Systems. Dr. Varma served on the Board of Directors of Optim Networks and ArcadiaOne.

Dr. Varma received his BSEE at Indian Institute of Technology India, his MSEE at the University of Maryland, College Park, Maryland and his Ph.D. in Electrical & Computer Engineering at Drexel University, Philadelphia, Pennsylvania. In addition, he has pubished several papers and been granted several patents, especially in the area of logic synthesis.

Mr. Seynhaeve started his career with Philips and Signetics where he developed his strong DSP and processor design background. Most recently he was at Mentor Graphics where he was involved with Place & Route and DFM with Mentor's formidable Calibre product line. Prior to Mentor, Mr. Seynhaeve was at Blaze DFM, where he managed multiple customer tape-outs of bleeding edge designs, focused on leakage power and timing closure issues.

Mr. Seynhaeve feels his real calling is ESL/DSP. At Synplicity, he architected the company's DSP solutions and built them out single-handedly to an independent product line in the Synplicity product portfolio. Prior to Synplicity, Mr. Seynhaeve was Director of Technical Marketing at Tera Systems where he focused on defining the product line and implementation strategies for RTL hand-off. In addition, Mr. Seynhaeve also held Director of Applications/Technical-Marketing positions at Tharas Systems and Escalade. In both companies, he was instrumental in building the complete team and infrastructure for world-wide application and customer support. Prior to that, at Compass Design Automation, Mr. Seynhaeve was responsible for applications, design and support activities with multiple large customers worldwide.

Mr. Seynhaeve holds an MSEE from the KU Louvain University, Belgium.

Prior to joining AutoESL, he was a Director of Product Development at Magma Design Automation, Inc, working on RTL and physical synthesis for FPGA and ASIC. Before that, Dr. Pan was a founding member and the Director of Engineering at Aplus Design Technologies, Inc, an FPGA physical synthesis startup, which was later acquired by Magma. He also worked at Strategic CAD Labs, Intel Corporation and spent over two years as a tenure-track professor at Clarkson University.

Dr. Pan has a Ph. D. in Computer Science from University of Illinois at Urbana-Champaign. He has over 30 technical publications in algorithm design and EDA.

He has extensive experience helping start-up companies grow sales and develop business partnerships. He has held senior sales & business development positions with leading companies including Daisy, VLSI/Compass, Quickturn, Aptix, Avanti, Cadence, AccelChip & Xilinx.

Mr. Phillippe is the quintessential customer advocate and truly enjoys seeing customers adopt leading-edge design technologies that have a high impact on their business.